KUTEM Seminar Series - Burç Mısırlıoğlu

Time: 14:30
Location: ENG208



Speaker: I. Burç Mısırlıopğlu, Faculty of Engineering and Natural Sciences, Sabanci University

Title: Tailoring Ferroelectricity for Energy Efficient Data Storing and Processing Devices 

Date: 22.02.2017 

Time: 14:30-15:30

Place: Eng 208 




Ferroelectric Field Effect Transistors (FeFETs) have entered the agenda of the semiconductor device groups following the first papers in 1990s on this topic. Other than controlling polarization and/or the dielectric response of the ferroelectric to obtain transistor action in a channel, presence of remnant polarization is also an attractive property for solid-state non-volatile memories. Termination of the ferroelectric polarization at the ferroelectric-semiconductor interface leads to additional band bending in both the semiconductor and the ferroelectric and can be tailored for effective control of carriers at the interface in FETs.  In this study, we present theoretical results on the effect of semiconductor electrodes on the functional response of ferroelectric layers and superlattices. A computational approach using the thermodynamic theory of ferroelectrics in contact with semiconductor interfaces is undertaken. Stability limit of the polar phase is explored, revealing the importance of the boundary conditions on device functionality and possible integration efforts of well-known ferroelectrics such as BaTiO3 and Pb(Zr,Ti)O3 (PZT) solid solutions. We show that electrical domains are inevitable and directly impact the carrier distributions in the semiconductor channel. Domains can be tailored, contrary to the desire to utilize a switchable single domain state, for power efficient binary logic FETs..Efficient manipulation of carriers in the semiconductor via domain wall motion at bias values much lower than conventional FET gate voltages is theoretically shown [1, 2] and the results are compared to real device data [3] to explain certain characteristic features of domain related phenomena in FETs. This is followed by comments on the limit of use of such layers for the much desired “non-volatile memory” function of the gate such as tailoring the thickness effect of the ferroelectric to minimize domain density keeping in mind some recent results in ferroelectric-paraelectric superlattice structures [4, 5]. We finally propose a design of a non-destructive read-out, low power consumption ferroelectric based memory that employs a tunnel junction connected in series to the ferroelectric bit layer via a semiconductor interlayer [6].



1. I. B. Misirlioglu, M. Yildiz, K. Sendur, Domain control of carrier density at a ferroelectric-semiconductor interface, Scientific Reports, 5, 14740 (2015).

2. I. B. Misirlioglu, C. Sen, M. T. Kesim and S. P. Alpay, Low voltage ferroelectric-paraelectric superlattices as gate materials for field effect transistors, 50th Anniversary Issue of Journal of Materials Science, 2015.

3. Sakai S. and Takahashi M., Recent Progress of Ferroelectric-Gate Field-Effect Transistors and Applications to Nonvolatile Logic and FeNAND Flash Memory, Materials  3, 4950-4964 (2010).

4. A. P. Levanyuk and I. B. Misirlioglu, “Phase transitions in ferroelectric-paraelectric superlattices”, Journal of Applied Physics 110, 114109 (2011).

5. A. P. Levanyuk and I. B. Misirlioglu, “Phase transitions in ferroelectric-paraelectric superlattices: Stability of single domain state”, Applied Physics Letters 103, 192906 (2013).

6. I. B. Misirlioglu and K. Sendur, “Ferroelectric/Semiconductor/Tunnel-Junction Stacks for Nondestructive and Low-Power Read-Out Memory”, IEEE Transactions on Electron Devices, 63, 2374 (2016).